Pseudo Random Generator simulation with LogiSim

I have been working with Pseudo Random Generators (PRG) PCB layouts. I didn't find a suitable protoboard so I decided to built my own two layer protoboards. That has taken me a quite a long time but now it is almost done. I also decided first to simulate PRG with LogiSim www.cburch.com/logisim/. LogiSim is a free Java-based software. I found from web the basic TTL-chip libraries for LogiSim. The Odd/Even Parity Generator 74180 I didn't find so I had to build it from the basic logic gates as a sub circuit (pictured below).

74180 parity generator

Here below you can see the PRG circuit in LogiSim. In the middle-left there is the 24-bit shift-register build from three cascaded 74164 8-bit shift-registers. Right from the shift-register is 24-bit odd/even generator from three 74180 modules. Up are the switches (LogiSim constants) where you can choose the XOR/feedback points for the LFSR sequence. Down-left are 24 LED's that show the shift-registers bits. Right from the LED's is the start-logic that handless the non-allowed zero status. Right there is the Sync-module (also pictured here below separately) that identifies the start/end of the sequence and blinks a LED whenever this happens. This simulation works and is a proof of the concept so that I can go ahead with the PCB-layout.

PRG-circuit

 

Sync-generator